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IEICE Transactions on Information and Systems - Volume 102 / Issue 12

Title
Authors Volume Issue Page Year PKV
Interworking Layer of Distributed MQTT Brokers
Ryohei BANNO, Jingyu SUN, Susumu TAKEUCHI, Kazuyuki SHUDO 102 12 2281–2294 2019 22.92
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FPGA-Based Annealing Processor with Time-Division Multiplexing
Kasho YAMAMOTO, Masayuki IKEBE, Tetsuya ASAI, Masato MOTOMURA, Shinya ... 102 12 2295–2305 2019 16.23
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Memory Efficient Load Balancing for Distributed Large-Scale Volume Rendering Using a Two-Layered Group Structure
Marcus WALLDEN, Stefano MARKIDIS, Masao OKITA, Fumihiko INO 102 12 2306–2316 2019 14.35
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Decentralized Local Scaling Factor Control for Backoff-Based Opportunistic Routing
Taku YAMAZAKI, Ryo YAMAMOTO, Genki HOSOKAWA, Tadahide KUNITACHI, Yoshi ... 102 12 2317–2328 2019 10.48
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Accelerating the Held-Karp Algorithm for the Symmetric Traveling Salesman Problem
Kazuro KIMURA, Shinya HIGA, Masao OKITA, Fumihiko INO 102 12 2329–2340 2019 11.5
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Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks
Kota ANDO, Kodai UEYOSHI, Yuka OBA, Kazutoshi HIROSE, Ryota UEMATSU, T ... 102 12 2341–2353 2019 13.22
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A Lightweight Method to Evaluate Effect of Approximate Memory with Hardware Performance Monitors
Soramichi AKIYAMA 102 12 2354–2365 2019 10.46
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An FPGA-Based Change-Point Detection for 10Gbps Packet Stream
Takuma IWATA, Kohei NAKAMURA, Yuta TOKUSASHI, Hiroki MATSUTANI 102 12 2366–2376 2019 10.56
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A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies
Atsushi KOSHIBA, Takahiro HIROFUCHI, Ryousei TAKANO, Mitaro NAMIKI 102 12 2377–2388 2019 14.29
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Skew-Aware Collective Communication for MapReduce Shuffling
Harunobu DAIKOKU, Hideyuki KAWASHIMA, Osamu TATEBE 102 12 2389–2399 2019 15.14
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