IEICE Transactions in Information and Systems - 巻 101 / 号 2
| タイトル | |||||||||
|---|---|---|---|---|---|---|---|---|---|
| 著者 | 巻 | 号 | ページ | 年 | PKV | ||||
| Three Dimensional FPGA Architecture with Fewer TSVs | |||||||||
| Motoki AMAGASAKI, Masato IKEBE, Qian ZHAO, Masahiro IIDA, Toshinori SU ... | 101 | 2 | 278–287 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing | |||||||||
| Hoang-Gia VU, Shinya TAKAMAEDA-YAMAZAKI, Takashi NAKADA, Yasuhiko NAKA ... | 101 | 2 | 288–302 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device | |||||||||
| Toshihiro KATASHITA, Masakazu HIOKI, Yohei HORI, Hanpei KOIKE | 101 | 2 | 303–313 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| Area Efficient Annealing Processor for Ising Model without Random Number Generator | |||||||||
| Hidenori GYOTEN, Masayuki HIROMOTO, Takashi SATO | 101 | 2 | 314–323 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| A Describing Method of an Image Processing Software in C for a High-Level Synthesis Considering a Function Chaining | |||||||||
| Akira YAMAWAKI, Seiichi SERIKAWA | 101 | 2 | 324–334 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| Enabling FPGA-as-a-Service in the Cloud with hCODE Platform | |||||||||
| Qian ZHAO, Motoki AMAGASAKI, Masahiro IIDA, Morihiro KUGA, Toshinori S ... | 101 | 2 | 335–343 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment | |||||||||
| Shimpei SATO, Ryohei KOBAYASHI, Kenji KISE | 101 | 2 | 344–353 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| An FPGA Realization of a Random Forest with k-Means Clustering Using a High-Level Synthesis Design | |||||||||
| Akira JINGUJI, Shimpei SATO, Hiroki NAKAHARA | 101 | 2 | 354–362 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| FPGA Components for Integrating FPGAs into Robot Systems | |||||||||
| Takeshi OHKAWA, Kazushi YAMASHINA, Hitomi KIMURA, Kanemitsu OOTSU, Tak ... | 101 | 2 | 363–375 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||
| A Threshold Neuron Pruning for a Binarized Deep Neural Network on an FPGA | |||||||||
| Tomoya FUJII, Shimpei SATO, Hiroki NAKAHARA | 101 | 2 | 376–386 | 2018 | 0.0 | ||||
| 平均評価: 0.0 / 5 (0 件のレビュー) | |||||||||