A Design for Testability of Open Defects at Interconnects in 3D Stacked ICs
['Fara ASHIKIN', 'Masaki HASHIZUME', 'Hiroyuki YOTSUYANAGI', 'Shyue-Kung LU', 'Z ...']
/
IEICE Transactions on Information and Systems
/ Vol. 101
/ No. 8
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